74AUP1G74GT,115

Overview

The Nexperia 74AUP1G74GT,115 is a single positive-edge triggered D-type flip-flop featuring set and reset inputs. It operates within a supply voltage range of 0.8 V to 3.6 V, ensuring low static power consumption with a maximum I_CC of 0.9 μA. The device provides complementary Q and Q outputs and includes I_OFF circuitry for partial power-down applications. It is specified for operation from -40 °C to +125 °C and utilizes an 8-XSON package.

Feature Summary

• Positive-edge triggered D-type flip-flop with individual data, clock, set, and reset inputs
• I_OFF circuitry enables partial power-down mode by disabling outputs to prevent backflow current
• Schmitt-trigger action at all inputs ensures tolerance for slower input rise and fall times

Applications

• Partial power-down systems requiring controlled output disablement
• Digital logic circuits operating across wide voltage ranges
• Applications demanding low static power consumption in CMOS designs

Procurement Notes

Verify the specific suffix GT,115 against official Nexperia documentation to confirm the exact package variant and tape/reel specifications. Ensure that the required operating temperature range aligns with the component's qualified limits. Confirm RoHS compliance status through the manufacturer's latest environmental declarations before finalizing procurement orders.

Selection Notes

Select this component when a single D-type flip-flop with set/reset functionality is required in a compact surface-mount package. The 74AUP series offers low power dissipation and high noise immunity suitable for battery-powered or energy-efficient designs. Verify that the 0.8 V to 3.6 V supply range matches the system's voltage rails and that the I_OFF feature meets the power management requirements.

Part Context

This part belongs to the Nexperia 74AUP family of advanced ultra-low power CMOS logic devices. The AUP series is designed for applications requiring low power consumption while maintaining high speed and wide voltage operation. The 74AUP1G74 specifically implements a D-type flip-flop with set and reset capabilities, differing from non-latching buffers or gates within the same logical family.

Replacement Considerations

No public confirmed substitute part numbers are available in the provided source material.