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ADC084S051CIMMX/NOPB is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is IC ADC 8BIT SAR 10VSSOP. Review the specifications below when checking this part for your BOM.
The ADC084S051CIMMX/NOPB is a low-power, four-channel CMOS 8-bit analog-to-digital converter featuring a high-speed serial interface. Based on successive-approximation register architecture with an internal track-and-hold circuit, it accepts up to four input signals at pins IN1 through IN4. The device operates with a single supply ranging from +2.7V to +5.25V and ensures full specification over a sample rate range of 200 ksps to 500 ksps. Typical power consumption is 2.2 mW at 3V and 7.1 mW at 5V. It utilizes straight binary output compatible with SPI, QSPI, MICROWIRE, and DSP interfaces.
Verify the ordering suffix CIMMX against the manufacturer's current product folder to confirm package type and temperature range specifications. Ensure the NOPB designation aligns with lead-free compliance requirements for the specific manufacturing batch. Cross-reference the datasheet revision date to validate electrical characteristics against the latest production data.
Select this component when multi-channel acquisition is required within a low-power constraint. The 8-bit resolution and 500 ksps throughput suit moderate-speed applications. Verify that the system clock frequency falls within the 3.2 MHz to 8 MHz range to ensure AC electrical performance limits are met across the operating temperature range.
This device belongs to the ADC084S family of 8-bit converters. It is pin-compatible with higher-resolution variants such as the ADC104S051 and ADC124S051, allowing for design scalability without PCB layout changes. The standard version supports 200–500 ksps, while other family members cover different speed ranges like 50–200 ksps or 500 ksps–1 Msps.
Pin-compatible alternatives include the ADC084S021 (50–200 ksps) and ADC084S101 (500 ksps–1 Msps). Higher-resolution options in the same footprint are the ADC104S051 and ADC124S051.
Channel selection is controlled via the DIN pin during the first 8 rising edges of SCLK after CS goes low. Bits ADD2, ADD1, and ADD0 in the control register determine whether IN1, IN2, IN3, or IN4 is sampled next.
When CS is high, the device enters power-down mode. Consumption drops to 0.12 µW at a 3V supply or 0.35 µW at a 5V supply.
No, there are no power-up delays or dummy conversions required. The ADC can sample and convert an input to full conversion immediately following power-up, starting with IN1.
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