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ADC3643IRSBR is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is IC ADC 14BIT SAR 40WQFN. Review the specifications below when checking this part for your BOM.
The ADC3643IRSBR is a dual-channel, 14-bit analog-to-digital converter from Texas Instruments operating at sampling rates up to 65 MSPS. It features a WQFN-40 (5 mm × 5 mm) package and operates on a single 1.8-V supply. Key electrical specifications include a noise spectral density of –155 dBFS/Hz, an SNR of 79.0 dBFS at 1.1 MHz input frequency, and an SFDR of 93 dBc for HD2/HD3. DC accuracy includes DNL of ±0.2 LSB and INL of ±0.6 LSB. The device supports DDR and serial CMOS interfaces with a latency of one clock cycle.
Verify the component authenticity by checking the manufacturer marking against the official datasheet. Confirm the ordering suffix matches the required package type and temperature grade. Ensure the specific revision level aligns with your design requirements. Cross-reference the part number with authorized distributors to confirm availability status. Validate that the received units match the specified pin configuration and electrical characteristics.
Select the ADC3643IRSBR when high-speed sampling up to 65 MSPS is required alongside low power consumption. Consider this device for designs needing flexible digital interfaces to minimize interconnect complexity. Evaluate the integrated decimation filter if baseband processing is needed directly within the ADC. Compare power dissipation metrics against system thermal constraints at maximum sampling rates.
This component belongs to the ADC364x family, which includes the ADC3641 and ADC3642 variants. These devices share pin compatibility and architectural similarities but differ in maximum sampling speeds. The ADC3643 represents the highest performance tier within this specific series, offering 65 MSPS operation compared to lower speeds in other family members.
The ADC3641 and ADC3642 are pin-compatible alternatives within the same family. Select these substitutes only if lower sampling rates meet system requirements. Verify that the reduced bandwidth does not impact signal integrity. Ensure software configurations remain compatible with the shared register map structure.
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