ADP7118ACPZN3.3-R7

Overview

The ADP7118ACPZN3.3-R7 is a CMOS low dropout linear regulator manufactured by Analog Devices Inc., providing a fixed 3.3 V output with a maximum current of 200 mA. It operates from an input voltage range of 2.7 V to 20 V and features ultralow noise of 11 µV rms. The device includes precision enable, user-programmable soft start, and protection against overcurrent and thermal overload. Packaged in a compact 6-lead LFCSP (2 mm × 2 mm), it supports operation across temperatures from -40°C to +125°C.

Feature Summary

• Ultralow output noise of 11 µV rms independent of the fixed output voltage for options up to 5 V
• High power supply rejection ratio reaching 88 dB at 10 kHz
• User-programmable soft start capability via external capacitor in LFCSP package
• Precision enable pin with programmable logic thresholds

Applications

• Regulation for noise-sensitive analog and mixed-signal circuits
• Powering ADC and DAC circuits as well as precision amplifiers
• Providing power for VCO VTUNE control
• Communications and infrastructure equipment
• Medical and healthcare instrumentation

Procurement Notes

Verify the specific suffix R7 indicates tape and reel packaging when ordering. Confirm the ACPZN designation corresponds to the 6-lead LFCSP package variant. Ensure the 3.3 fixed output voltage matches the system requirement. Check for automotive qualification if operating in AEC-Q100 environments. Validate that the design tool ADIsimPower is used for final schematic generation.

Selection Notes

Select this component for applications requiring high PSRR and minimal output noise from higher input rails. The 200 mA capacity suits moderate load requirements. Consider the adjustable mode capability if output voltages above the fixed 3.3 V set point are needed. Evaluate thermal performance based on the junction-to-ambient resistance of the LFCSP package. Ensure input and output capacitors meet the minimum capacitance and ESR specifications for stability.

Part Context

This part belongs to the ADP7118 family of low noise CMOS LDO regulators. The series offers various fixed output voltages ranging from 1.2 V to 5.0 V. Other package options include 8-lead SOIC and 5-lead TSOT. The family is designed for portable equipment due to low quiescent current consumption. It supports adjustment of fixed outputs to higher voltages using external dividers.

Replacement Considerations

ADP7118ACPZN-R7: Adjustable output version in the same LFCSP package.

FAQ

Can the fixed 3.3 V output be adjusted to a higher voltage?

Yes, the fixed output can be increased above the initial set point using an external feedback resistor divider.

What is the typical startup time for this regulator?

The typical startup time is approximately 380 µs when the soft start pin is left open.

Is the device stable with ceramic capacitors?

Yes, it is stable with small 2.2 µF ceramic output capacitors, provided they meet the specified ESR requirements.