CLC5956IMTD

Analog To Digital Converters (ADC) Overview

The CLC5956IMTD is a monolithic 12-bit, 65 MSPS analog-to-digital converter subsystem optimized for cellular base stations and high-resolution applications. It features differential analog inputs with a common-mode voltage of +2.4V, low-jitter differential PECL clock inputs, and a wideband track-and-hold circuit providing DC to 300 MHz input bandwidth. The device utilizes a proprietary 12-bit multi-stage quantizer on an ABIC-IV 0.8 micron BiCMOS process. Key electrical specifications include a typical Signal-to-Noise Ratio (SNR) of 67 dB, Spurious-Free Dynamic Range (SFDR) of 73 dBc at 5 MHz, and power consumption of 615 mW. It operates from a single +5V supply over the industrial temperature range of −40°C to +85°C.

Analog To Digital Converters (ADC) Feature Summary

• High-speed conversion: 65 MSPS sample rate with 300 MHz large-signal bandwidth.
• Low jitter performance: Aperture jitter is typically 0.4 ps rms.
• Differential interfaces: Differential analog inputs and differential PECL clock inputs minimize noise and jitter.
• Compact packaging: Available in a 48-pin TSSOP package for space-constrained designs.

Analog To Digital Converters (ADC) Applications

• Cellular base-stations
• IF sampling systems
• Digital communications
• Infrared/CCD imaging
• Medical imaging

Analog To Digital Converters (ADC) Procurement Notes

Verify the manufacturer origin, as Texas Instruments acquired National Semiconductor which originally produced this part. Confirm the specific ordering suffix 'IMTD' corresponds to the standard 48-pin TSSOP package without tape and reel formatting, distinct from the 'IMTDX' variant. Ensure compatibility with existing board layouts if replacing older inventory.

Analog To Digital Converters (ADC) Selection Notes

Select the CLC5956IMTD when a 12-bit resolution and up to 65 MSPS throughput are required with a single +5V supply. Consider the CLC5957 if higher guaranteed sample rates (70MHz), internal PECL clock conversion, or shutdown capabilities are needed, noting that pinout modifications may be necessary for direct substitution.

Analog To Digital Converters (ADC) Part Context

The CLC5956 is part of the CLC595x family of broadband monolithic A/D converters. It was originally manufactured by National Semiconductor before being integrated into Texas Instruments' portfolio following their acquisition. The device is designed to replace discrete ADC solutions in high-performance data acquisition systems requiring compact form factors.

Analog To Digital Converters (ADC) Replacement Considerations

The CLC5957 is a compatible upgrade offering enhanced features such as a 70 MHz guaranteed sample rate and internal PECL clock conversion. Direct replacement requires modifying board connections for pins 27 and 28 to utilize CLC5957-specific functions like DAV and OUTLEV.

Analog To Digital Converters (ADC) FAQ

What is the recommended analog input voltage range?

The full-scale differential analog input voltage range is 2.048 Vpp, with a common-mode voltage of nominally +2.4V derived from an internal bandgap reference.

How does the minimum conversion rate affect operation?

The minimum conversion rate is 10 MSPS. Below this rate, internal bipolar track-and-hold circuits may cause droop errors. For lower output rates, the ADC should be clocked higher and data decimated.

What is the digital output coding format?

The digital outputs use two's complement coding. D0 is the Least Significant Bit (LSB) and D11 is the Most Significant Bit (MSB), which is inverted.