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Product Detailed Parameters
- Description:IC SWITCH SPST-NOX2 35OHM 16SOIC
- Series:-
- Mfr:Analog Devices Inc./Maxim Integrated
- Package:Tube
- Switch Circuit:SPST - NO
- Multiplexer/Demultiplexer Circuit:1:01
- On-State Resistance (Max):35Ohm
- Channel-to-Channel Matching (ΔRon):3Ohm (Max)
- Voltage - Supply, Single (V+):10V ~ 30V
- Voltage - Supply, Dual (V±):±4.5V ~ 20V
- Switch Time (Ton, Toff) (Max):250ns, 200ns
- -3db Bandwidth:-
- Charge Injection:10pC
- Channel Capacitance (CS(off), CD(off)):12pF, 12pF
- Current - Leakage (IS(off)) (Max):500pA
- Crosstalk:-90dB @ 1MHz
- Operating Temperature:-40°C ~ 85°C (TA)
- Mounting Type:Surface Mount
- Package / Case:16-SOIC (0.154", 3.90mm Width)
- Supplier Device Package:16-SOIC
- Number of Circuits:2
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Overview
The DG423DY+ is a dual, single-pole/double-throw (SPDT) CMOS analog switch with latchable logic inputs. It features two normally open and two normally closed switches per package. Key electrical parameters include a maximum on-resistance of 35Ω, guaranteed on-resistance matching of 3Ω max, and on-resistance flatness of 4Ω max over the signal range. The device operates from a single +10V to +30V supply or bipolar ±4.5V to ±20V supplies. Maximum turn-on time is 250ns and turn-off time is 200ns. Charge injection is limited to 15pC max, and off-leakage current is less than 5nA at +85°C. It is housed in a 16-SOIC package.
Feature Summary
- Features latchable logic inputs for simplified microprocessor interfacing
- Provides rail-to-rail signal handling capabilities across the full supply range
- Ensures low charge injection and improved off-leakage current performance
Applications
- Sample-and-Hold Circuits
- Battery-Operated Systems
- Audio Signal Routing
Procurement Notes
Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm RoHS compliance status and check for end-of-life notices as availability may be restricted. Ensure proper ESD handling procedures are followed during storage and assembly to maintain device reliability.
Selection Notes
Select this component when dual SPDT switching with latched control signals is required. Verify that the 35Ω on-resistance meets system loss requirements. Ensure the operating temperature range aligns with environmental conditions. Consider the 16-SOIC package dimensions for PCB layout constraints.
Part Context
This part belongs to the DG421/DG423/DG425 family of improved low-power CMOS analog switches. The DG423 variant specifically provides two SPDT switches, distinguishing it from the DG421 (dual SPST) and DG425 (dual DPST). All variants share similar electrical characteristics and latch functionality.
Replacement Considerations
DG421DY+
FAQ
What is the logic compatibility of the DG423DY+?
The device maintains TTL compatibility with V_L = +5V and operates at CMOS-logic-level inputs if V_L is connected to other supply voltages.
How does the DG423 handle break-before-make intervals?
The DG423 includes a break-before-make interval to prevent short circuits between outputs during switching transitions.
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