LM809M3X-4.00

Supervisors Overview

The LM809M3X-4.00 is a microprocessor supervisory circuit manufactured by Texas Instruments, designed to monitor power supply voltages in digital systems. It features a fixed threshold voltage of 4.00 V and operates within a maximum supply voltage of 5.5 V. The device provides an active low, push-pull output with a reset delay time of 240 ms. It is housed in a SOT-23-3 surface-mount package and supports an operating temperature range from -40°C to +105°C. Accuracy is specified at 5%.

Supervisors Feature Summary

• Monitors single power supply input for microprocessor systems
• Provides active low push-pull reset signal output
• Includes fixed internal reset delay timer

Supervisors Applications

• Microprocessor power supply supervision
• Digital system voltage monitoring
• Embedded controller reset circuits

Supervisors Procurement Notes

Verify the specific threshold voltage matches the target system requirement of 4.00 V. Confirm the SOT-23-3 package footprint aligns with the PCB layout. Ensure the operating temperature range covers the intended environmental conditions. Check that the active low output polarity is compatible with the receiving logic inputs.

Supervisors Selection Notes

Select this component when a fixed 4.00 V threshold is required for system supervision. Consider the 240 ms reset delay duration relative to system startup timing requirements. Evaluate the 5% accuracy specification against the acceptable voltage margin. Verify compatibility with the available 5.5 V maximum supply rail.

Supervisors Part Context

This part belongs to the LM809/LM810 family of 3-pin microprocessor reset circuits. It serves as a dedicated voltage supervisor alternative to general-purpose comparators. The series offers various fixed threshold options to suit different standard voltage rails.

Supervisors Replacement Considerations

Cross-reference with LM809M3 variants having identical 4.00 V thresholds. Verify pinout compatibility with SOT-23-3 packages. Ensure equivalent reset delay characteristics are maintained.