LPC47M112-MW

Specialized Overview

The LPC47M112 is a 3.3V (5V tolerant) Super I/O controller compliant with PC98/PC99 standards, implementing the Low Pin Count (LPC) interface for pin-reduced ISA bus connectivity. It integrates a licensed CMOS 765B floppy disk controller compatible with Microchip's 82077AA core, two NS16C550A-compatible UARTs, and a multi-mode parallel port supporting EPP/ECP with ChiProtect circuitry. The device includes an 8042 software-compatible keyboard controller, dual game ports, MPU-401 MIDI support, fan control logic, and intelligent power management features including PME and SMI.

Specialized Feature Summary

• Integrates a true CMOS 765B floppy disk controller core providing 100% IBM compatibility and advanced digital data separation.
• Features a multi-mode parallel port with IEEE 1284 compliance and integrated ChiProtect circuitry for enhanced signal integrity.
• Supports intelligent power management through programmable wake-up events via keyboard, mouse, or GPIO inputs under trickle power.
• Includes dual full-function serial ports with 16-byte FIFOs and an infrared interface compliant with IrDA 1.0 specifications.

Specialized Applications

• Desktop computer system boards requiring legacy I/O integration
• Industrial control systems utilizing ISA-compatible peripheral interfaces
• Embedded computing platforms needing low-pin-count LPC connectivity

Specialized Procurement Notes

Verify component authenticity by checking the marking code against official Microchip documentation. Confirm the specific suffix matches the required package variant. Ensure the silicon revision aligns with your design requirements, as errata sheets may exist for certain revisions. Validate that the supply voltage levels match your system architecture before integration.

Specialized Selection Notes

Select this component when a 3.3V operation with 5V tolerant non-LPC pins is required. Ensure the design accommodates the 100-pin QFP package dimensions. Verify that the system supports the LPC interface protocol and provides necessary clock inputs. Consider the available GPIO count and interrupt routing options to meet specific peripheral mapping needs.

Specialized Part Context

This component belongs to the LPC47M1xx series of Super I/O controllers from Microchip Technology. It serves as a successor to earlier ISA-based I/O solutions, offering reduced pin counts while maintaining compatibility with legacy protocols. The series is designed for cost-effective integration of standard PC peripherals into modern embedded architectures.

Specialized Replacement Considerations

Consult Microchip documentation for direct replacements within the LPC47M1xx family. Verify pinout compatibility if substituting with other Super I/O devices. Check for functional equivalence in floppy controller and UART implementations. Review configuration register maps to ensure software migration feasibility.