PCA9517ADP/DG,118

Signal Buffers, Repeaters, Splitters Overview

The PCA9517ADP/DG,118 is a CMOS integrated circuit providing bidirectional level shifting between low voltage (0.9 V to 5.5 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. It features two channels isolating capacitance for up to 400 pF on either side. The device supports Standard-mode and Fast-mode devices with a maximum clock frequency of 400 kHz. Propagation delay ranges from 30 ns to 250 ns depending on direction and supply voltage. Operating temperature spans -40 °C to +85 °C in an 8-pin TSSOP package.

Signal Buffers, Repeaters, Splitters Feature Summary

• Bidirectional buffering isolates bus capacitance and enables voltage translation between distinct logic levels.
• Supports arbitration and clock stretching across the repeater without degrading system performance.
• Powered-off pins remain high-impedance, preventing interference when the device is unpowered.

Signal Buffers, Repeaters, Splitters Applications

• Translating signals between a 3.3 V master and a 1.2 V slave on separate I2C buses.
• Extending I2C bus length by buffering data and clock lines while maintaining protocol compatibility.
• Star topology configurations connecting multiple nodes to a common bus segment.

Signal Buffers, Repeaters, Splitters Procurement Notes

Verify the specific ordering suffix against current NXP documentation to confirm package material specifications. Confirm that the component meets the required environmental standards for the intended application environment before finalizing procurement decisions.

Signal Buffers, Repeaters, Splitters Selection Notes

Select this component when isolation between different voltage domains is required alongside capacitance buffering. Ensure the design accommodates the propagation delays introduced by the repeater, as these may limit the maximum achievable system operating frequency below the nominal 400 kHz specification.

Signal Buffers, Repeaters, Splitters Part Context

This part is functionally identical to the PCA9517ADP but was initially produced with Dark Green package material. It serves as a temporary orderable part number for customers requiring lead-free and halogen/antimony-free materials. The standard part has since transitioned to this material composition.

Signal Buffers, Repeaters, Splitters Replacement Considerations

The PCA9517A is the recommended replacement for new designs, offering improved ESD protection compared to the original PCA9517. Verify pinout compatibility if substituting with other I2C repeaters such as the PCA9515A or PCA9617A.

Signal Buffers, Repeaters, Splitters FAQ

Can Port A and Port B be connected to devices with rise time accelerators?

No, Port B drivers have a static offset design and cannot be connected to devices with rise time accelerators like the PCA9510 or PCA9515A. Port A can be connected to such devices.

What is the minimum supply voltage for Port A?

Port A operates at a minimum supply voltage of 0.9 V, allowing translation down to very low voltage logic levels.

How does the Enable pin affect bus operation?

The EN pin is active HIGH and should only change state when the bus is idle. Changing its state during operation can hang the bus or confuse connected parts.