SI5335B-B04882-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5335B-B04882-GMR is a web-customizable, any-frequency, any-output quad clock generator and buffer manufactured by Skyworks Solutions. It utilizes MultiSynth fractional divider technology to synthesize four independent, non-integer-related frequencies up to 350 MHz with 0 ppm frequency synthesis error. The device supports flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. It features highly configurable output drivers capable of LVPECL, LVDS, CML, HCSL, CMOS, and SSTL/HSTL formats with independent voltage selection (1.5, 1.8, 2.5, or 3.3 V). Key electrical parameters include a core supply current of 45 mA in PLL mode and 12 mA in buffer mode, operating on a single supply of 1.8, 2.5, or 3.3 V.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• MultiSynth Technology: Enables independent synthesis of four frequencies up to 350 MHz with 0 ppm error.
• Configurable Outputs: Supports up to four differential pairs or eight single-ended outputs with independent voltage levels.
• Pin-Selectable Configurations: Allows three independent device configurations selectable via user-assigned pins.
• Low Phase Jitter: Achieves typical RMS jitter of 0.7 ps in clock generator mode.

Clock Generators, PLLs, Frequency Synthesizers Applications

• PCI Express Gen 1/2/3/4 common clock generation
• Ethernet switch/router clocking
• Processor and FPGA clocking
• DSL jitter attenuation
• Broadcast video/audio timing

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory configuration encoded in the ordering suffix B04882 against the system requirements using the ClockBuilder Pro utility. Confirm that the GMR suffix corresponds to the required tape-and-reel packaging format for automated assembly processes.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when multiple non-integer-related clock frequencies are required from a single source. Ensure the target output voltage levels (1.5V–3.3V) match the load requirements. Verify that the input reference signal type (crystal, CMOS, or differential) aligns with the available system clock sources.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5335 family of web-customizable clock generators. The 'B' designation typically indicates a specific performance grade or feature set within the series, while the numeric suffix defines the unique frequency plan and pin configuration programmed at the factory.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct replacements must be sourced from the Si5335 family with identical factory programming. Generic Si5335 devices require reconfiguration via ClockBuilder Pro to match the specific frequency plan and control pin assignments of the SI5335B-B04882-GMR.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the SI5335B?

The device supports output frequencies up to 350 MHz for LVPECL, LVDS, CML, SSTL, and HSTL formats. HCSL outputs are supported up to 250 MHz, and CMOS outputs up to 200 MHz.

How many independent device configurations can be selected?

The Si5335 supports up to three independent, user-assignable, pin-selectable device configurations, allowing one physical device to replace three separate clock generators.

What loop bandwidth options are available for jitter attenuation?

The device offers two selectable PLL loop bandwidth settings: a high bandwidth option of 1.6 MHz and a low bandwidth option of 475 kHz.