SI5345D-B00001-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5345D-B00001-GMR is a factory preprogrammed clock synthesizer and jitter cleaner from the Si5345 Rev D family. It features four inputs and ten outputs, supporting differential frequencies up to 350 MHz and LVCMOS outputs up to 250 MHz. The device integrates fourth-generation DSPLL technology for ultra-low jitter attenuation of 90 fs rms. It operates on a core voltage (VDD) of 1.8 V ±5% and an analog supply (VDDA) of 3.3 V ±5%. The component is housed in a 64-QFN package measuring 9x9 mm and supports an operating temperature range of -40°C to +85°C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using integer and fractional synthesis modes.
• Features programmable jitter attenuation bandwidth ranging from 0.1 Hz to 4 kHz with integrated loop filter.
• Supports hitless input clock switching between fractionally related clocks and glitchless on-the-fly output frequency changes.
• Includes in-circuit programmable non-volatile memory to ensure known frequency configuration upon power-up.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the B00001 suffix against the design requirements. Confirm that the QFN-64 package dimensions and pinout match the PCB footprint. Ensure the serial interface protocol (I2C or SPI) aligns with the system controller capabilities.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when a fixed, preconfigured clock solution is required rather than a blank prototyping device. The 'D' designation indicates support for output frequencies up to 350 MHz. Verify that the application requires the specific frequency plan programmed into the NVM, as reprogramming may be limited compared to blank variants.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5345 Rev D series, which utilizes MultiSynth and DSPLL technologies. Unlike the base Si5345-D-GM, the B00001 suffix denotes a custom factory preprogrammed variant. This eliminates the need for external configuration during initial deployment while retaining the standard electrical characteristics of the Si5345 family.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345D-D-GMR

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the Si5345D variant?

The Si5345D variant supports differential output frequencies up to 350 MHz and LVCMOS output frequencies up to 250 MHz.

How does the device handle input clock loss?

The device automatically enters holdover mode if the selected input clock becomes invalid and no other valid inputs are available, using stored historical frequency data to maintain output stability.

Is the loop filter discrete or integrated?

The loop filter is fully integrated on-chip, which eliminates the risk of noise coupling associated with discrete solutions.