SI5348B-B05018-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5348B-B05018-GM is a factory pre-programmed network synchronizer and jitter attenuator from the Si5348 family. It integrates three independent DSPLLs within a single monolithic IC, supporting SyncE/IEEE 1588 architectures. The device features ultra-low jitter of 100 fs typ (12 kHz to 20 MHz) and meets ITU-T G.8262, G.812, G.813, and Telcordia GR-1244/GR-253 standards. It operates with a core voltage of 1.8 V ±5% and an analog supply of 3.3 V ±5%. Input frequencies range from 8 kHz to 750 MHz for differential clocks, while outputs support up to 350 MHz differentially. The component is housed in a 64-Lead 9x9 QFN package and functions within a temperature range of –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Three independent DSPLLs allow flexible configuration for SyncE, IEEE 1588, and SETS architectures.
• Digitally Controlled Oscillator (DCO) mode provides precise timing adjustment for PTP clock steering applications.
• In-circuit programmable non-volatile memory ensures known configuration upon power-up.
• Supports glitchless input switching and ramped holdover exit to minimize phase disturbances.

Clock Generators, PLLs, Frequency Synthesizers Applications

• Synchronous Ethernet (SyncE) ITU-T G.8262 EEC Option 1 & 2
• Telecom Boundary Clock (T-BC) as defined by ITU-T G.8273.2
• IEEE 1588 (PTP) slave clock synchronization
• Stratum 3/3E, G.812, G.813 network synchronization

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm the exact pre-programmed configuration. Factory pre-programmed devices are assigned unique numerical sequences by the ClockBuilder Pro software. Ensure compatibility with existing serial interface protocols and power supply requirements before integration.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this part when a fixed, pre-configured network synchronizer is required without custom programming. The Si5348B variant supports output frequencies up to 350 MHz, distinguishing it from the higher-frequency Si5348A. Confirm that the application requires the specific frequency plan stored in the NVM, as reprogramming may be limited or require specific tools.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5348 series of network synchronizers designed for telecom and data center applications. The 'B' designation indicates a maximum output frequency of 350 MHz, compared to 718.5 MHz for the 'A' grade. The 'GM' suffix denotes the QFN package and RoHS compliance. The numerical sequence following the dash represents the unique factory pre-programmed configuration.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5348B-D-GM

Clock Generators, PLLs, Frequency Synthesizers FAQ

How is the frequency accuracy determined in free-run mode?

The frequency accuracy and stability during free-run and holdover modes are determined by the external reference clock connected to the REF/REFb pins, typically a TCXO or OCXO.

What is the purpose of the DCO mode?

The Digitally Controlled Oscillator (DCO) mode allows precise timing adjustment to 1 ppt per step, primarily used for IEEE 1588 (PTP) clock steering applications where timestamps are recovered by the PHY/MAC.

Can the device switch inputs without glitches?

Yes, the Si5348 supports hitless input switching for IN0-IN2 and glitchless input switching for IN3-IN4, ensuring continuous clock generation during transitions.