SN74LS73ADR

Flip Flops Overview

The SN74LS73ADR is a dual J-K flip-flop integrated circuit from Texas Instruments, belonging to the 74LS logic family. It features two independent J-K flip-flops with negative-edge triggering and active-low clear inputs within a 14-pin SOIC package. The device operates on a supply voltage ranging from 4.75V to 5.25V. Key electrical parameters include a maximum propagation delay of 20ns at 5V with 45pF load, a clock frequency of 45 MHz, and static current consumption of 6 mA. Output currents are specified as 400µA for high state and 8mA for low state.

Flip Flops Feature Summary

• Dual independent J-K flip-flops with negative-edge triggering
• Active-low clear input functionality
• Complementary output types

Flip Flops Applications

• Frequency division circuits
• Shift register construction
• Binary counter implementation

Flip Flops Procurement Notes

Verify that the ordering suffix 'ADR' corresponds to the SOIC-14 surface-mount package variant rather than the PDIP through-hole version. Confirm RoHS3 compliance status and ensure the manufacturer part number matches the specific datasheet revision required for design integration. Cross-reference the distributor's component identification to avoid confusion with similar LS series devices.

Flip Flops Selection Notes

Select this component when a dual J-K configuration with negative-edge triggering is required in a surface-mount design. Compare against the SN74LS73AN if through-hole mounting is preferred. Ensure the 74LS logic family characteristics align with the system's power and speed requirements relative to other TTL-compatible options.

Flip Flops Part Context

This device is part of the SN74LS73A series, which includes variants such as SN74LS73AN and SN74LS73ADRE4. It shares functional similarities with other 74LS flip-flops but is distinguished by its specific package type and manufacturing revision. The SN74LS73ADR represents the standard surface-mount offering for this logic function.

Flip Flops Replacement Considerations

SN74LS73AN (PDIP equivalent)

Flip Flops FAQ

What is the triggering edge for the SN74LS73ADR?

The SN74LS73ADR utilizes negative-edge triggering for its J-K flip-flops.

Does the SN74LS73ADR have preset or clear inputs?

Yes, it features active-low clear inputs for both flip-flops.