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The AirBorn VSM-08-10-200-50-04-N1 is a vertical male board stacking connector from the verSI series, designed for high-density PCB mounting. It features a 1.27 mm pitch and comprises 8 rows with 10 columns, providing 80 circuits. The unit utilizes press-fit termination for secure attachment to the substrate. Constructed with a liquid crystal polymer (LCP) plastic body, it supports a maximum board spacing of 20.00 mm. The contacts are gold-plated phosphor bronze pins rated for 2 A current at 200 V. Operating within a temperature range of -55 °C to +125 °C, this MIL-DTL-83513 compliant plug ensures reliable signal integrity in demanding environments.
Verify the specific ordering suffix against the manufacturer's latest revision to confirm termination style and plating specifications. Confirm that the required board thickness falls within the supported mechanical limits for the selected guide pin or jacknut configuration. Ensure compatibility with the target PCB stack-up height before finalizing procurement orders.
Select this component when a vertical male connection is required for rigid board stacking. The 1.27 mm pitch allows for high circuit density within constrained volumes. Verify that the 20.00 mm board spacing aligns with the mechanical design constraints of the enclosure. Ensure the press-fit termination process is compatible with the manufacturing capabilities of the assembly line.
This part belongs to the AirBorn verSI series, which offers rectangular MIL-DTL-83513 connectors. The series provides various row and column configurations to accommodate different circuit counts. The VSM designation indicates a vertical male orientation, distinguishing it from other series variants. The product line emphasizes signal integrity and reliability for harsh environment applications.
Direct substitutes must match the 1.27 mm pitch, 8x10 matrix, and press-fit termination. Verify equivalent MIL-DTL-83513 compliance and identical board spacing dimensions. Cross-reference contact material and plating specifications to ensure performance parity.

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