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ADC3642IRSBR is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is DUAL-CHANNEL, 14-BIT, 25-MSPS, L. Review the specifications below when checking this part for your BOM.
The ADC3642IRSBR is a dual-channel, 14-bit analog-to-digital converter from Texas Instruments. It supports sampling rates up to 25 MSPS with a noise spectral density of -155 dBFS/Hz. The device operates on a single 1.8-V supply and consumes approximately 70 mW per channel at full speed. Key specifications include an SNR of 79.0 dBFS and SFDR of 95 dBc at 1.1 MHz input frequency. It features DDR or serial CMOS interfaces, a latency of one clock cycle, and an optional on-chip digital filter. The component is housed in a 40-pin WQFN package and functions within an industrial temperature range of –40°C to +105°C.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm package type and tape-and-reel specifications. Ensure that the voltage reference configuration matches the system requirements, as the device supports both internal and external reference options. Confirm compatibility with the intended digital interface mode before finalizing procurement orders.
Select this model when a 25 MSPS sampling rate is required alongside high linearity and low power consumption. Compare performance metrics such as SNR and SFDR against higher-speed variants like the ADC3643 if bandwidth permits. Consider the available digital interface options and the necessity for the integrated decimation filter when evaluating alternative components in the family.
This component belongs to the ADC364x family of low-noise, ultra-low power dual-channel ADCs. The family includes the ADC3641 (10 MSPS), ADC3642 (25 MSPS), and ADC3643 (65 MSPS). All devices share pin-to-pin compatibility and similar architectural features, differing primarily in maximum sampling speed and associated power consumption characteristics.
The ADC3641 and ADC3643 are pin-compatible alternatives within the same family. Selection depends on whether the application requires lower power at reduced speeds or higher throughput at increased power levels. Verify that the specific speed grade meets the system timing constraints.
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