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ADC3644IRSBR is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is DUAL-CHANNEL, 14-BIT, 125-MSPS,. Review the specifications below when checking this part for your BOM.
The ADC3644IRSBR is a dual-channel, 14-bit analog-to-digital converter (ADC) from Texas Instruments. It supports sampling rates up to 125 MSPS with a noise spectral density of -153 dBFS/Hz. The device operates on a single 1.8-V supply and consumes 82 mW per channel at maximum speed. It features an integral latency of one clock cycle and offers DDR or serial CMOS digital interfaces. The component includes an optional on-chip digital downconverter with decimation factors of 2, 4, 8, 16, and 32. It is housed in a 40-pin WQFN package measuring 5 mm by 5 mm and supports an industrial temperature range from -40°C to +105°C.
Verify the specific suffix IRSBR against the manufacturer's current datasheet to confirm the package type and tape-and-reel configuration. Ensure that the ordering information matches the required thermal performance metrics and interface specifications for your target application environment.
Select this component when low noise floor and minimal power consumption are critical constraints. The 14-bit resolution combined with 125 MSPS throughput suits applications requiring high dynamic range. Consider the integrated digital filter if system-level anti-aliasing requirements can be relaxed through digital decimation.
This device belongs to the ADC364x family, which shares pin compatibility across different speed grades. The series includes variants such as the ADC3641, ADC3642, and ADC3643, offering lower sampling rates while maintaining the same form factor and interface standards for scalable design implementations.
The ADC3643 serves as a direct pin-compatible alternative within the same family, offering a reduced sampling rate of 65 MSPS. Designers should verify that the lower throughput meets the Nyquist requirements of their specific signal bandwidths before substituting components.
The device delivers a noise spectral density of -153 dBFS/Hz, ensuring high signal fidelity during conversion.
Yes, the device includes an internal reference option, though it also supports external 1.6 V references or buffered 1.2 V inputs.
While the base ADC latency is one clock cycle, adding real or complex decimation via the digital downconverter introduces additional output clock cycles depending on the decimation factor selected.
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