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ADC3910S065IRSMT is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is 10-BIT, ONE-CHANNEL, 65-MSPS ADC. Review the specifications below when checking this part for your BOM.
The ADC3910S065IRSMT is a single-channel, 10-bit analog-to-digital converter with a sampling rate of 65 MSPS. It operates on a single 1.8V AVDD supply and supports IOVDD from 1.8V to 3.3V. The device features an input bandwidth of 150MHz (-3dB) and offers buffered, differential, or single-ended inputs with a differential full-scale range of 1.9Vpp. Power consumption at 65 MSPS is typically 58mW. It provides low latency of one clock cycle in default mode and includes integrated digital comparators and a statistics engine. The component is housed in a 32-pin VQFN package (4mm x 4mm) and supports industrial temperatures from -40°C to +105°C.
Verify the specific suffix 'IRSMT' against the manufacturer's official orderable part list to confirm package type, temperature grade, and reel specifications. Ensure the design accommodates the 32-VQFN thermal pad requirements for adequate heat dissipation. Confirm that the selected interface mode aligns with the system's timing constraints, as serial modes introduce additional latency compared to parallel outputs.
Select this model when a single channel with 65 MSPS throughput is required. Consider the ADC3910D065 if dual-channel operation is needed, or the ADC3910S125 for higher speed up to 125 MSPS. Verify that the 1.8V analog supply and optional 3.3V digital I/O meet the system voltage requirements. Ensure the application can utilize the internal reference or provide a stable external 1.2V reference on the VREF pin.
This component belongs to the ADC3910 family, which includes single and dual-channel variants with resolutions of 8-bit and 10-bit. The family shares pin compatibility across different speed grades (25, 65, and 125 MSPS). The 'S' designation indicates a single-channel architecture, while '065' specifies the 65 MSPS sampling rate capability within this high-speed, low-power series.
ADC3910S125: Higher speed variant (125 MSPS).
The default interface for the single-channel device is Single Data Rate (SDR) CMOS.
Enabling the DDC adds significant latency; for example, a decimation factor of 16 adds 270 additional clock cycles to the total latency.
No, the analog supply (AVDD) is strictly limited to 1.8V (1.7V to 1.9V range), while only the digital I/O supply (IOVDD) can be raised to 3.3V.
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