CDC924DL

Application Specific Clock/Timing Overview

The CDC924 is a clock synthesizer and driver designed for Pentium III class PC motherboards. It generates multiple system clocks from a single 14.318-MHz crystal input using two internal phase-locked loops (PLLs). The device provides four 2.5-V CPU outputs (100/133 MHz), seven 3.3-V PCI outputs (33 MHz), four 3.3-V 3V66 outputs (66 MHz), three 2.5-V APIC outputs (16.67 MHz), one 3.3-V REF output (14.318 MHz), and one 3.3-V 48-MHz output. It features spread spectrum clocking with 0.5% downspread to reduce EMI, low output skew and jitter, and 3-state outputs controlled by SEL inputs.

Application Specific Clock/Timing Feature Summary

• Generates CPU (100/133 MHz), PCI (33 MHz), 3V66 (66 MHz), APIC (16.67 MHz), REF (14.318 MHz), and 48-MHz clocks from a 14.318-MHz crystal input
• Includes spread spectrum clocking (SSC) with 0.5% downspread for reduced electromagnetic interference
• Features two independent PLLs with on-chip loop filters and internal feedback loops
• Provides 3-state outputs with power management control terminals for complete device shutdown

Application Specific Clock/Timing Applications

• Pentium III class PC motherboards
• System clock generation for CPU, PCI, and AGP buses
• Clock distribution for Direct Rambus systems when used with TI CDCR81/CDCR82/CDCR83 generators

Application Specific Clock/Timing Procurement Notes

Verify the package type is 56-pin SSOP (DL package). Confirm the operating temperature range is 0°C to 85°C. Check that the datasheet revision matches SCAS607A – November 1998 – Revised May 1999. Ensure the component supports both 2.5-V and 3.3-V supply requirements as specified in the recommended operating conditions.

Application Specific Clock/Timing Selection Notes

Select this component for designs requiring a single-source clock generator for Intel Pentium III architectures. It is suitable when low skew and jitter are critical for CPU and PCI bus reliability. The device requires a 14.318-MHz crystal or fixed-frequency reference at XIN. Designers must account for a 3 ms stabilization time after power-up or SEL input changes before phase lock is achieved.

Application Specific Clock/Timing Part Context

The CDC924 is part of Texas Instruments' clock synthesizer family targeting legacy PC motherboard applications. It was specifically engineered to support the timing requirements of Pentium III processors and associated chipset components. The device integrates multiple buffer types (Type 1, 3, and 5) to drive different voltage domains within the system.

Application Specific Clock/Timing Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.