CLC5958SLB

Analog To Digital Converters (ADC) Overview

The CLC5958 is a monolithic 14-bit, 52 MSPS analog-to-digital converter fabricated on a 0.8-micron BiCMOS process. It integrates a low-distortion track-and-hold amplifier and a multi-stage quantizer. The device features differential analog inputs biased at +3.25V with a full-scale range of 2.048 VPP differential. Key electrical specifications include a spurious-free dynamic range (SFDR) of 90 dB and a signal-to-noise ratio (SNR) of 70 dB at 52 MSPS. It operates from a single +5V supply for analog circuits and a programmable +3.3V to +5V supply for digital outputs.

Analog To Digital Converters (ADC) Feature Summary

• 14-bit resolution with 52 MSPS maximum conversion rate
• 90 dB SFDR and 70 dB SNR performance
• Differential analog inputs and PECL-compatible clock inputs
• Programmable digital output levels (+3.3V to +5V)
• 48-pin PLGA package with low thermal resistance

Analog To Digital Converters (ADC) Applications

• Multi-channel base-stations
• Smart antenna systems
• Wideband digital communications

Analog To Digital Converters (ADC) Procurement Notes

The CLC5958 is designated as obsolete in the provided documentation. Verify current availability status through authorized distributors or Texas Instruments sales offices before procurement planning. Ensure compliance with standard warranty terms and verify that the latest relevant information is obtained prior to order placement.

Analog To Digital Converters (ADC) Selection Notes

Select this component for applications requiring high-speed sampling up to 52 MSPS with 14-bit precision. The device requires AC coupling for analog inputs to maintain optimal common mode voltage; DC coupling requires an external servo loop using the VCM pin. Minimum sample rate is 20 MSPS to prevent droop errors; lower rates require decimation. Ensure power supplies are bypassed with 0.01 µF capacitors close to the pins.

Analog To Digital Converters (ADC) Part Context

Originally manufactured by National Semiconductor and later acquired by Texas Instruments, the CLC5958 is part of the CLC59xx series of high-speed ADCs. The datasheet revision history indicates a transition from National Semiconductor format to Texas Instruments format in April 2013. The device utilizes the ABIC-V 0.8 micron BiCMOS process technology.

Analog To Digital Converters (ADC) Replacement Considerations

The datasheet does not list specific replacement part numbers. As the component is marked obsolete, consult Texas Instruments for potential modern equivalents or alternative solutions for discontinued products.

Analog To Digital Converters (ADC) FAQ

What is the recommended input coupling method for the CLC5958?

AC coupling is recommended to preserve the internal +3.25V common mode bias. If DC coupling is required, the VCM pin must be used to establish the input common mode voltage via an external servo loop.

How should the ENCODE clock inputs be driven?

The ENCODE inputs are differential and referenced to VCC. They accept PECL levels or differential signals centered 1.2V below VCC. A DC bias current path must be provided for each input as they are not self-biasing.

What is the minimum conversion rate for the CLC5958?

The minimum conversion rate is 20 MSPS. Below this rate, bipolar track-and-hold circuits may cause droop errors. Lower effective rates should be achieved by clocking at higher speeds and decimating the output data.