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Product Detailed Parameters
- Description:IC SWITCH SPDT X 2 45OHM 16SOIC
- Series:-
- Mfr:Analog Devices Inc./Maxim Integrated
- Package:Tube
- Switch Circuit:SPDT
- Multiplexer/Demultiplexer Circuit:2:01
- On-State Resistance (Max):45Ohm
- Channel-to-Channel Matching (ΔRon):500mOhm
- Voltage - Supply, Single (V+):10V ~ 30V
- Voltage - Supply, Dual (V±):±4.5V ~ 20V
- Switch Time (Ton, Toff) (Max):150ns, 100ns
- -3db Bandwidth:-
- Charge Injection:10pC
- Channel Capacitance (CS(off), CD(off)):12pF, 12pF
- Current - Leakage (IS(off)) (Max):500pA
- Crosstalk:-90dB @ 1MHz
- Operating Temperature:0°C ~ 70°C (TA)
- Mounting Type:Surface Mount
- Package / Case:16-SOIC (0.154", 3.90mm Width)
- Supplier Device Package:16-SOIC
- Number of Circuits:2
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Overview
The DG403CY is a dual, high-speed analog switch featuring two single-pole/double-throw (SPDT) channels in a 16-pin Narrow SO package. It operates from a single +10V to +30V supply or bipolar supplies of ±4.5V to ±20V. The device guarantees an on-resistance of 45Ω maximum and a channel-to-channel match of 2Ω maximum. Switching times are 150ns for turn-on and 100ns for turn-off. Power consumption is limited to 35µW maximum. Leakage currents remain below 5nA at +85°C. Charge injection is capped at 15pC. The component supports rail-to-rail signal handling and maintains TTL/CMOS logic compatibility.
Feature Summary
- Dual SPDT configuration with guaranteed low on-resistance matching between channels
- High-speed switching capability with minimal charge injection
- Low off-state leakage current performance across temperature ranges
- TTL and CMOS logic compatible input control
Applications
- Sample-and-Hold Circuits
- Test Equipment
- Guidance and Control Systems
- Audio Signal Routing
Procurement Notes
Verify the specific suffix 'CY' corresponds to the 16-pin Narrow SO package and the 0°C to +70°C operating temperature range. Confirm that the ordering information matches the manufacturer's current documentation, as legacy part numbers may have updated specifications or packaging details. Ensure the procurement source provides valid RoHS compliance data if required by the application standards.
Selection Notes
Select this component when a dual SPDT analog switch is required with tight on-resistance matching constraints. The narrow SO package is suitable for surface-mount applications where space is limited but through-hole options are not viable. Verify that the supply voltage range aligns with the system's power rails and that the logic input levels are compatible with the driving circuitry.
Part Context
The DG403CY belongs to the DG401/DG403/DG405 family of improved, dual, high-speed analog switches. This series features a redesigned silicon-gate process that enhances performance over previous iterations. The DG403 variant specifically provides two SPDT switches, distinguishing it from the SPST DG401 and the dual SPST DG405 models within the same product line.
Replacement Considerations
DG403DY+
FAQ
What is the maximum on-resistance flatness for the DG403CY?
The on-resistance flatness is guaranteed to be 3Ω maximum over the specified signal range.
How does the DG403CY handle overvoltage conditions?
Signals on S, D, or IN exceeding V+ or V- are clamped by internal diodes. External blocking diodes can be added for additional protection if proper power-supply sequencing is not possible.
What is the break-before-make delay for the DG403CY?
The break-before-make delay is typically 10ns and has a maximum of 20ns at +25°C.
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