DM74LS373WM

Latches Overview

The DM74LS373WM is an octal D-type transparent latch manufactured by onsemi, housed in a 20-lead Small Outline Integrated Circuit (SOIC) package. It features totem-pole 3-STATE outputs designed for driving highly-capacitive or low-impedance loads. The device operates within a supply voltage range of 4.75 V to 5.25 V and supports a free air operating temperature from 0°C to +70°C. Propagation delay from data to output ranges from 18 ns to 27 ns at VCC = 5V.

Latches Feature Summary

• Transparent latching behavior where outputs follow inputs while the enable signal is HIGH
• Buffered output control input allows placement of outputs in high-impedance state without affecting internal latch operation
• P-N-P inputs reduce DC loading on data lines

Latches Applications

• Implementing buffer registers
• I/O ports
• Bidirectional bus drivers
• Working registers

Latches Procurement Notes

Verify the manufacturer origin, as this component was originally produced by Fairchild Semiconductor before its acquisition by onsemi. Confirm that the SOIC package dimensions match the JEDEC MS-013 standard for a 0.300-inch width. Ensure the specific ordering code suffix corresponds to the tape and reel option if required, as standard packaging may differ.

Latches Selection Notes

Select this component when a transparent latch configuration is required rather than edge-triggered storage. The LS logic family provides standard drive capabilities suitable for general-purpose digital systems. Consider the propagation delay specifications relative to system timing requirements and ensure the 3-STATE output capability aligns with the bus architecture design.

Latches Part Context

This part belongs to the DM74LS373/DM74LS374 series, which combines octal D-type transparent latches and edge-triggered flip-flops in a single datasheet. The DM74LS373 variant specifically implements transparent latching controlled by an enable signal, distinguishing it from the clock-triggered DM74LS374. Both share similar pinouts and electrical characteristics.

Latches Replacement Considerations

SN74LS373N

Latches FAQ

How does the output control input affect the internal operation of the latches?

The output control input places the eight outputs in either a normal logic state or a high-impedance state. This control does not affect the internal operation of the latches, allowing old data to be retained or new data to be entered even while the outputs are OFF.

What is the function of the P-N-P inputs in this device?

The P-N-P inputs are designed to reduce DC loading on the data lines connected to the device.