MC100E310FNG

Clock Buffers, Drivers Overview

The MC100E310FNG is a low voltage, low skew 2:8 differential ECL fanout buffer designed for clock distribution. It features fully differential clock paths to minimize device and system skew, with two selectable clock inputs (CLKa/CLKb) for redundant or test clocks. The device operates in PECL mode (VCC = 4.2 V to 5.7 V, VEE = 0 V) or NECL mode (VCC = 0 V, VEE = -4.2 V to -5.7 V). Key electrical parameters include a maximum toggle frequency of 900 MHz, typical part-to-part skew of 200 ps, and within-device skew of 50 ps. Power supply current is typically 60 mA at 25°C.

Clock Buffers, Drivers Feature Summary

• Dual differential fanout buffers with 2:8 configuration
• Low skew performance: 200 ps part-to-part, 50 ps output-to-output
• Selectable clock inputs (CLKa/CLKb) via CLK_SEL pin
• Internal 50 kΩ input pulldown resistors and VBB reference voltage

Clock Buffers, Drivers Applications

• Clock distribution networks requiring low skew
• Systems utilizing redundant or test clock sources
• PECL and NECL logic interface applications

Clock Buffers, Drivers Procurement Notes

Verify the package type is PLCC-28 and the suffix indicates Pb-Free compliance. Confirm the specific ordering suffix (FNG vs FNR2G) matches the required shipping quantity (Tube vs Tape & Reel). Ensure the design supports the required thermal management for the PLCC-28 package.

Clock Buffers, Drivers Selection Notes

Select this component when low skew differential ECL buffering is required. Ensure the power supply configuration matches either PECL (+5V) or NECL (-5V) standards. Verify that the PCB layout accommodates the 28-lead PLCC footprint and provides adequate termination for all eight output pairs to maintain specified skew characteristics.

Clock Buffers, Drivers Part Context

The MC100E310 belongs to the onsemi 100 Series ECL family, which includes temperature compensation. It is distinct from other series members like the MC100LE310 (low voltage) or MC100LVEP210 (clock buffer) by its specific 2:8 fanout ratio and dual-input selection capability within a PLCC-28 package.

Clock Buffers, Drivers Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.