MC10H602FNG

Translators, Level Shifters Overview

The MC10H602FNG is a 9-bit TTL to ECL translator with D-type latches, manufactured by onsemi. It utilizes a PLCC-28 package and operates with dual supplies: VCCT at +5.0 V ± 10% and VEE at -5.2 V ± 5%. The device features PNP TTL inputs for low loading and includes control pins for Latch Enable (LEN), Master Reset (MR), and post-latch logic enable (ENECL). Propagation delay from data input to output ranges from 1.4 ns to 3.5 ns depending on temperature.

Translators, Level Shifters Feature Summary

• Features D-type latching controlled by dedicated ECL-level inputs
• Includes post-latch logic enable to control outputs without destroying stored data
• Utilizes PNP TTL inputs to minimize loading on the source circuit

Translators, Level Shifters Applications

• Byte-parity applications
• TTL to ECL signal translation
• High-speed digital data buffering

Translators, Level Shifters Procurement Notes

Verify the specific ordering suffix against current manufacturer documentation. Confirm that the 'G' suffix indicates a lead-free package status as defined in the official datasheet. Ensure compatibility with MECL 10H logic levels before procurement. Check for any product change notices or end-of-life announcements directly from the manufacturer.

Translators, Level Shifters Selection Notes

Select this component when interfacing TTL logic sources with ECL destinations requiring data storage. The dual-supply architecture supports standard MECL 10H voltage levels. Consider the flow-through configuration and extra power/ground pins for noise minimization in high-speed designs requiring byte-wide parallel translation.

Translators, Level Shifters Part Context

This part belongs to the MC10H/100H602 series of 9-bit translators. It is designed for optimal signal flow-through and electrical performance within the PLCC-28 footprint. The H602 variant specifically targets compatibility with MECL 10H/C0116 ECL logic levels, distinguishing it from the 100H version which supports 100K levels.

Translators, Level Shifters Replacement Considerations

MC10H602FN

Translators, Level Shifters FAQ

How is the latch state preserved during output disabling?

The post-latch logic enable (ENECL) allows control of the output state without destroying the data stored in the D-type latches.

What are the required supply voltages for operation?

The device requires a TTL supply (VCCT) of +5.0 V ± 10% and an ECL supply (VEE) of -5.2 V ± 5%.