SI5340A-B06061-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5340A-B06061-GM is a programmable clock generator from Skyworks Solutions, part of the Si5340 series. It features four outputs with a maximum frequency of 1.028 GHz and supports input frequencies up to 750 MHz. The device operates within a supply voltage range of 1.71 V to 3.47 V and delivers ultra-low jitter performance of 90 fs rms. It utilizes MultiSynth technology for precise frequency synthesis.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Ultra-low jitter performance with sub-100 fs rms phase noise
• Supports any-frequency, any-output configuration for flexible clock generation
• Integrates wide-band PLL with proprietary fractional synthesizer technology
• Capable of generating integer and non-integer related frequencies

Clock Generators, PLLs, Frequency Synthesizers Applications

• High-speed data communication systems requiring precise clocking
• Telecommunications infrastructure equipment
• Test and measurement instruments
• Networking switches and routers

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific suffix B06061 against official Skyworks documentation to confirm exact factory programming parameters. Ensure compatibility with existing board designs regarding the QFN-44 package and thermal requirements. Confirm RoHS compliance status through current manufacturer datasheets before procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when designing systems requiring multiple differential clock outputs with ultra-low jitter. It replaces multiple discrete oscillators and buffers. Consider the 1.028 GHz maximum output frequency and 750 MHz input limit. Use ClockBuilderPro software for configuration and custom part number assignment via SPI interface.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5340 family of any-frequency, any-output clock generators. It combines a wide-band PLL with MultiSynth fractional synthesizer technology. The device allows independent assignment of output formats such as CML, HCSL, LVCMOS, LVDS, and LVPECL, enabling a single-chip clock tree solution.