SI5345A-B05452-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345A-B05452-GM is a 10-output jitter attenuator and clock multiplier from the Si5345 family, manufactured by Skyworks Solutions Inc. It utilizes fourth-generation DSPLL and MultiSynth technologies to generate any combination of output frequencies from any input frequency. The device supports differential inputs from 8 kHz to 750 MHz and LVCMOS inputs from 8 kHz to 250 MHz. Output frequencies range from 100 Hz to 1028 MHz for differential outputs and up to 250 MHz for LVCMOS outputs. It features ultra-low jitter performance of 90 fs rms and meets ITU-T G.8262 EEC Option 1 and 2 (SyncE) standards. The component is housed in a 64-QFN 9×9 mm package and operates within a temperature range of –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fractional and integer synthesis modes.
• Features programmable jitter attenuation bandwidth ranging from 0.1 Hz to 4 kHz with integrated loop filter.
• Supports hitless input clock switching between fractionally related clocks and glitchless on-the-fly output frequency changes.
• Includes in-circuit programmable non-volatile memory for storing configuration data, ensuring known power-up states.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory preprogramming details. Ensure compatibility with the required serial interface protocol (I2C or SPI) and check for any recent product change notices regarding the Si5345 family. Confirm that the external crystal specifications align with the recommended 25 to 54 MHz range for optimal jitter performance.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when high channel count and flexible frequency synthesis are required. The Si5345A variant supports both integer and fractional synthesis modes with output frequencies up to 1028 MHz. Consider the Si5345B if the application requires a maximum output frequency limit of 350 MHz. Verify that the 64-QFN package footprint fits the PCB layout constraints and that the supply voltage requirements (VDD 1.8 V, VDDA 3.3 V) match the system design.

Clock Generators, PLLs, Frequency Synthesizers Part Context

The SI5345A-B05452-GM belongs to the Si5345/44/42 Rev D family of jitter attenuators. This family integrates DSPLL and MultiSynth technologies to provide low-jitter clock generation. The 'A' designation indicates support for both integer and fractional synthesis modes with high-frequency outputs. The 'D' suffix denotes the Rev D datasheet revision, which includes updated electrical specifications and functional descriptions compared to earlier revisions.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345A-D-GM

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the SI5345A variant?

The SI5345A variant supports differential output frequencies up to 1028 MHz and LVCMOS output frequencies up to 250 MHz.

Does the device support locking to gapped input clocks?

Yes, the DSPLL supports locking to gapped input clocks, provided the minimum frequency is 10 MHz with a maximum of two missing cycles out of every eight.

How is the jitter attenuation bandwidth controlled?

The jitter attenuation bandwidth is digitally programmable via registers, allowing selection from 0.1 Hz to 4 kHz without requiring external discrete components.