SI5347C-B04939-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Si5347C-B04939-GM is a factory pre-programmed clock synthesizer and jitter attenuator from the Si5347 Rev D family. It integrates four independent Dual-Loop Synthesizing Phase-Locked Loops (DSPLLs) within a 64-lead QFN package. The device supports any-frequency conversion with output frequencies ranging from 100 Hz to 720 MHz for differential outputs and up to 250 MHz for LVCMOS outputs. Input frequency ranges include 8 kHz to 750 MHz for differential signals, 8 kHz to 250 MHz for LVCMOS, and 25–54 MHz for external crystals. It operates on a core voltage of 1.8 V ±5% and an auxiliary voltage of 3.3 V ±5%, functioning reliably across a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Integrates four independent DSPLLs capable of generating any output frequency from any input frequency using flexible crosspoint routing.
• Features ultra-low jitter performance of 95 fs rms and programmable jitter attenuation bandwidth per DSPLL ranging from 0.1 Hz to 4 kHz.
• Supports automatic and manual hitless input clock switching, along with glitchless on-the-fly frequency changes and holdover modes.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• Broadcast video

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify that the specific ordering suffix matches the required factory pre-programmed configuration. Confirm the component revision corresponds to the Rev D datasheet specifications. Ensure the package type aligns with the target PCB land pattern requirements before finalizing procurement orders.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this part when multiple independent timing paths are required within a single integrated solution. The Si5347C variant supports differential output frequencies up to 720 MHz. Utilize ClockBuilder Pro software to generate the unique numerical sequence ID for the custom factory pre-programmed configuration.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Skyworks Si5347 family of high-performance jitter-attenuating clock multipliers. The 'C' designation indicates support for differential output frequencies up to 720 MHz. The 'B04939' sequence represents a specific factory pre-programmed configuration generated via ClockBuilder Pro software.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5347A-D-GM

Clock Generators, PLLs, Frequency Synthesizers FAQ

How does the Fastlock feature affect lock acquisition time?

The Fastlock feature allows setting a temporary higher loop bandwidth during the lock acquisition process, enabling the DSPLLs to lock faster before reverting to the configured lower nominal bandwidth.

What is the purpose of Holdover Mode?

Holdover Mode automatically engages when the selected input clock becomes invalid. It uses stored historical frequency data to maintain output stability until a valid input clock is restored.

Can the device switch between gapped input clocks?

Yes, the DSPLLs support locking to gapped input clocks by averaging the missing cycles to produce a periodic non-gapped output clock.