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Product Detailed Parameters
- Description:IC GATE NAND 1CH 2-INP 5TSSOP
- Series:74AUP
- Mfr:Nexperia USA Inc.
- Package:Tape & Reel (TR),Cut Tape (CT)
- Logic Type:NAND Gate
- Number of Circuits:1
- Number of Inputs:2
- Features:Schmitt Trigger
- Voltage - Supply:0.8V ~ 3.6V
- Current - Quiescent (Max):500 nA
- Current - Output High, Low:4mA, 4mA
- Input Logic Level - Low:0.1V ~ 0.88V
- Input Logic Level - High:0.6V ~ 2.29V
- Max Propagation Delay @ V, Max CL:7.8ns @ 3.3V, 30pF
- Operating Temperature:-40°C ~ 125°C
- Mounting Type:Surface Mount
- Supplier Device Package:5-TSSOP
- Package / Case:5-TSSOP, SC-70-5, SOT-353
- Grade:Automotive
- Qualification:AEC-Q100
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Overview
The Nexperia 74AUP1G132GW-Q100H is a single 2-input NAND gate with Schmitt-trigger inputs, designed for automotive applications. It operates within a supply voltage range of 0.8 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features low static power consumption (ICC max 0.9 μA at -40°C to +85°C) and IOFF circuitry for partial power-down mode operation. Propagation delay ranges from 1.4 ns to 7.2 ns depending on load capacitance and voltage. It complies with AEC-Q100 Grade 1 standards.
Feature Summary
- Schmitt-trigger action provides tolerance for slow input rise and fall times.
- IOFF circuitry prevents damaging backflow current during partial power-down.
- Automotive qualification in accordance with AEC-Q100 Grade 1.
- High noise immunity with overvoltage tolerant inputs up to 3.6 V.
Applications
- Wave and pulse shaper
- Astable multivibrator
- Monostable multivibrator
Procurement Notes
Verify the specific suffix GW corresponds to the TSSOP5 package (SOT353-1) and the Q100 designation confirms AEC-Q100 Grade 1 automotive qualification. Confirm the operating temperature range matches the required -40 °C to +125 °C specification for your application environment before finalizing procurement.
Selection Notes
Select this component when a single 2-input NAND function with hysteresis is required in space-constrained designs. The TSSOP5 package offers a compact footprint suitable for high-density PCB layouts. Ensure the design accounts for the specified propagation delays and output drive capabilities across the full 0.8 V to 3.6 V supply range.
Part Context
This part belongs to the 74AUP1G132-Q100 series of low-power CMOS logic gates. It is manufactured by Nexperia USA Inc. and utilizes the SOT353-1 (TSSOP5) plastic thin shrink small outline package. The marking code for this device is 'aE'.
Replacement Considerations
The datasheet lists the 74AUP1G132GZ-Q100 as an alternative package option (XSON5/SOT8065-1). No other direct functional substitutes are explicitly confirmed in the provided documentation.
FAQ
Does the 74AUP1G132GW-Q100H support partial power-down?
Yes, it includes IOFF circuitry that disables the output to prevent damaging backflow current when the device is powered down.
What is the maximum supply voltage for this device?
The recommended operating conditions specify a maximum supply voltage (VCC) of 3.6 V.
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