74AUP2G241GS,115

Buffers, Drivers, Receivers, Transceivers Overview

The Nexperia 74AUP2G241GS,115 is a low-power dual non-inverting buffer and line driver featuring 3-state outputs housed in an XSON8 package (SOT1203). It operates within a supply voltage range of 0.8 V to 3.6 V. The device incorporates Schmitt trigger inputs for noise immunity and IOFF circuitry to prevent backflow current during partial power-down states. Static supply current is limited to a maximum of 0.9 μA at 25 °C. Propagation delay ranges from 1.4 ns to 4.4 ns depending on voltage and temperature conditions.

Buffers, Drivers, Receivers, Transceivers Feature Summary

• Dual non-inverting buffers with independent 3-state output control via dedicated enable pins
• Schmitt trigger action on all inputs ensures tolerance to slow signal transitions across the full voltage range
• IOFF circuitry enables partial power-down mode by disabling outputs to prevent damaging backflow currents
• Input-disable feature allows floating input signals when specific output enable states are active

Buffers, Drivers, Receivers, Transceivers Applications

• Partial power-down applications requiring protection against backflow current
• Signal buffering in systems with slow rise and fall times
• Low-voltage logic interface circuits operating between 0.8 V and 3.6 V
• High-noise immunity data transmission lines

Buffers, Drivers, Receivers, Transceivers Procurement Notes

Verify the ordering suffix GS corresponds to the SOT1203 XSON8 package variant. Confirm RoHS compliance and REACH status requirements for your region. Check the latest datasheet revision for any updates to marking codes or thermal derating curves. Ensure ESD handling procedures meet the specified HBM and CDM protection levels during assembly.

Buffers, Drivers, Receivers, Transceivers Selection Notes

Select this component when designing low-power logic interfaces requiring Schmitt trigger inputs and 3-state isolation. The wide supply voltage range supports operation from 0.8 V up to 3.6 V. Consider the XSON8 package dimensions for space-constrained PCB layouts. Verify that the required propagation delay fits within your system timing constraints under expected load capacitance and temperature conditions.

Buffers, Drivers, Receivers, Transceivers Part Context

This part belongs to the 74AUP series of ultra-low-power CMOS logic devices manufactured by Nexperia. The AUP family is designed for applications demanding minimal static and dynamic power consumption while maintaining high noise immunity. The 74AUP2G241 specifically provides dual buffering capabilities with 3-state outputs, distinguishing it from standard single-function gates or non-3-state drivers within the same logic family.

Buffers, Drivers, Receivers, Transceivers Replacement Considerations

Public confirmed substitute part numbers: 74AUP2G241DC,125; 74AUP2G241GT,115; 74AUP2G241GN,115.