Latches 74LVT573DB,118 product image

74LVT573DB,118

$0.59
  • Description:IC D-TYPE TRANSP SGL 8:8 20SSOP
  • Series:74LVT
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)

SKU:0011ba7df9b4 Category: Brand:

  
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74LVT573DB,118 is listed in the Latches range at ChipApex. The manufacturer field lists Nexperia USA Inc.. Its product description is IC D-TYPE TRANSP SGL 8:8 20SSOP. Review the specifications below when checking this part for your BOM.

Latches specifications for 74LVT573DB,118

  • Description:IC D-TYPE TRANSP SGL 8:8 20SSOP
  • Series:74LVT
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)
  • Logic Type:D-Type Transparent Latch
  • Circuit:8:08
  • Output Type:Tri-State
  • Voltage - Supply:2.7V ~ 3.6V
  • Independent Circuits:1
  • Delay Time - Propagation:2.7ns
  • Current - Output High, Low:32mA, 64mA
  • Operating Temperature:-40°C ~ 85°C
  • Mounting Type:Surface Mount
  • Package / Case:20-SSOP (0.209", 5.30mm Width)
  • Supplier Device Package:20-SSOP
  • Grade:-
  • Qualification:-

Latches datasheet and documents for 74LVT573DB,118

74LVT573DB,118

Latches Overview

The Nexperia 74LVT573DB,118 is an octal D-type transparent latch with 3-state outputs housed in a SO20 (SOT163-1) package. It operates within a supply voltage range of 2.7 V to 3.6 V and supports input voltages up to 5.5 V. The device features bus hold data inputs to eliminate external pull-up resistors for unused lines. Propagation delays from LE to Qn range from 1.6 ns to 6.5 ns depending on voltage, while Dn to Qn delays range from 1.0 ns to 4.3 ns. It includes IOFF circuitry for partial power-down mode operation.

Latches Feature Summary

  • Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
  • IOFF circuitry provides partial power-down mode operation to prevent backflow current
  • Overvoltage tolerant inputs allow direct interface with systems at 5 V supply
  • Power-up reset ensures outputs assume a high-impedance OFF-state upon initialization

Latches Applications

  • Bus-oriented applications requiring 3-state non-inverting outputs
  • Microprocessor and microcomputer input or output ports
  • Live insertion and extraction permitted in system buses

Latches Procurement Notes

Verify the specific ordering suffix matches the required package type, as the 74LVT573 family includes multiple variants such as TSSOP and DHVQFN. Confirm that the SO20 plastic small outline package aligns with your PCB footprint requirements. Ensure the operating temperature range of -40 °C to +85 °C meets your environmental specifications before finalizing procurement.

Latches Selection Notes

Select this component when interfacing between 3.3 V logic and 5 V tolerant buses is required without level shifters. The BiCMOS technology offers high speed and strong output drive capabilities suitable for bus driving. Consider the bus hold feature if minimizing external components for floating inputs is a design priority. Verify that the 3-state output enable control fits your bus arbitration scheme.

Latches Part Context

This part belongs to the 74LVT series of low-voltage TTL-compatible logic devices manufactured by Nexperia. It is specifically designed for 3.3 V applications while maintaining compatibility with 5 V systems through overvoltage tolerant inputs. The device functions as an octal latch, storing eight bits of data controlled by a single latch enable signal.

Latches Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.

74LVT573DB,11874LVT573DB,118
$0.59
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