AD9629BCPZ-80

Analog To Digital Converters (ADC) Overview

The AD9629BCPZ-80 is a monolithic, single-channel 12-bit analog-to-digital converter (ADC) operating at an 80 MSPS sampling rate. It utilizes a multistage differential pipeline architecture with output error correction logic to ensure no missing codes across the full operating temperature range of -40°C to +85°C. The device features a high-performance sample-and-hold circuit and an on-chip voltage reference. It operates from a single 1.8 V analog supply and supports digital driver supplies ranging from 1.7 V to 3.6 V. Key performance metrics include a Signal-to-Noise Ratio (SNR) of 71.3 dBFS at a 9.7 MHz input frequency and a Spurious-Free Dynamic Range (SFDR) of 95 dBc under the same conditions.

Analog To Digital Converters (ADC) Feature Summary

• Multistage differential pipeline architecture with digital error correction for guaranteed accuracy
• Integrated sample-and-hold circuit and internal voltage reference
• Flexible serial port interface (SPI) for configuration control
• Supports offset binary, gray code, or twos complement data formats

Analog To Digital Converters (ADC) Applications

• Communications systems including GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA
• Diversity radio systems and multimode digital receivers
• Smart antenna systems
• Portable medical imaging and ultrasound equipment
• Battery-powered instruments and hand-held scope meters

Analog To Digital Converters (ADC) Procurement Notes

Verify the specific speed grade suffix in the part number to confirm the maximum sampling rate. Ensure the ordering documentation matches the required package type and RoHS compliance status. Confirm that the application environment falls within the specified industrial temperature range. Check for any recent product change notices that might affect pin compatibility or electrical specifications.

Analog To Digital Converters (ADC) Selection Notes

Select this component when a single-channel, low-power 12-bit ADC is required for high-speed applications up to 80 MSPS. Consider the separate DRVDD supply if interfacing with 3.3 V logic families is necessary. Evaluate the power consumption requirements against the available thermal dissipation capabilities of the LFCSP package. Verify that the differential input signal characteristics align with the 2 V p-p input span specification.

Analog To Digital Converters (ADC) Part Context

The AD9629BCPZ-80 belongs to the AD9629 family of 12-bit ADCs, which also includes variants with lower sampling rates such as 20 MSPS, 40 MSPS, and 65 MSPS. These devices share the same 32-lead LFCSP package and are pin-compatible with the AD9609 (10-bit) and AD9649 (14-bit) converters. This commonality facilitates migration paths between different resolution and speed grades within the same system design.

Analog To Digital Converters (ADC) Replacement Considerations

AD9629BCPZ-20

Analog To Digital Converters (ADC) FAQ

What is the maximum input clock frequency for the AD9629BCPZ-80?

The maximum input clock rate before the internal divider is 320 MHz. The conversion rate after the divider is 80 MSPS.

Does the AD9629BCPZ-80 support single-ended inputs?

No, the AD9629BCPZ-80 requires a differential analog input signal with a 2 V p-p span.

How is the analog ground connection handled in the LFCSP package?

The exposed paddle on the bottom of the package serves as the only ground connection and must be soldered to the analog ground plane of the PCB.