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DS1305EN+T&R is listed in the Real Time Clock range at ChipApex. The manufacturer field lists Analog Devices Inc./Maxim Integrated. Its product description is IC RTC CLK/CALENDAR SPI 20TSSOP. Review the specifications below when checking this part for your BOM.
The DS1305EN+T&R is a serial alarm real-time clock in a 20-pin TSSOP package, operating from -40°C to +85°C. It provides binary coded decimal (BCD) timekeeping for seconds through year with leap-year compensation valid to 2100. The device includes 96 bytes of battery-backed NV RAM and two programmable time-of-day alarms. It supports SPI Modes 1 and 3 or standard 3-wire interfaces. Operating voltage ranges from 2.0V to 5.5V on primary and backup supplies.
Verify the industrial temperature grade (-40°C to +85°C) corresponds to the 'N' suffix in the part number DS1305EN+T&R. Confirm RoHS compliance indicated by the '+' suffix. Ensure the tape and reel packaging matches production requirements. Check that the specific revision of the datasheet aligns with the manufacturing batch.
Select this component when an industrial temperature range is required alongside SPI or 3-wire connectivity. The dual-power architecture allows flexible backup strategies using either supercapacitors or lithium cells. Ensure the microcontroller interface logic voltage is compatible with the VCCIF pin if operating below 5V. Verify crystal load capacitance requirements match the internal oscillator design specifications.
This part belongs to the DS1305 family of serial alarm RTCs manufactured by Analog Devices / Maxim Integrated. The EN variant specifically denotes the industrial temperature extension compared to the commercial E version. The T&R suffix indicates the device is supplied in tape and reel format for automated assembly processes.
The DS1306EN+T&R is a functionally similar alternative within the same product family, offering identical pinout and interface capabilities. Both devices share the same 20-pin TSSOP package and core RTC functionality. Verify specific register compatibility if migrating between these variants.
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