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MC74HC390ANG is listed in the Counter Dividers range at ChipApex. The manufacturer field lists onsemi. Its product description is IC DECADE COUNTER DL 4BIT 16DIP. Review the specifications below when checking this part for your BOM.
The MC74HC390ANG is a dual 4-stage binary ripple counter manufactured by onsemi in the 74HC logic series. It features two independent counters, each composed of a divide-by-two and a divide-by-five section. The device operates within a supply voltage range of 2.0 V to 6.0 V and supports an operating temperature from -55°C to +125°C. It utilizes high-performance silicon-gate CMOS technology with 244 FETs per package. The maximum clock frequency reaches 50 MHz at 6.0 V. Propagation delays vary based on voltage and load, ranging from 20 ns to 90 ns.
Verify that the ordering suffix 'N' corresponds to the PDIP-16 package type as specified in the official documentation. Confirm Pb-Free status if required, noting that the base part number may differ from the Pb-Free variant designation. Ensure compatibility with standard CMOS outputs and LSTTL interfaces when pull-up resistors are utilized.
Select this component when dual independent counters are required within a single package. The HC series offers low input current and high noise immunity suitable for general digital logic applications. Verify that the asynchronous reset functionality meets system requirements, as state changes occur due to internal ripple delays rather than simultaneous transitions.
This device belongs to the 74HC family of high-speed CMOS logic integrated circuits. It is functionally identical in pinout to the LS390, allowing for potential direct replacements in legacy designs where speed and power consumption profiles align with HC specifications.
MC74HC390AD
Each counter has separate clock inputs. Connecting Output QA to Clock B input creates a decade divider with BCD output, while connecting Output QD to Clock A input creates a bi-quinary count sequence.
The internal flip-flops are triggered by high-to-low transitions of the respective clock inputs.
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