SI5342A-B05646-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5342A-B05646-GM is a jitter attenuating clock multiplier featuring fourth-generation DSPLL and MultiSynth technologies. It provides four inputs and two outputs in a 44-QFN 7x7 mm package. The device generates any combination of output frequencies from any input frequency with an ultra-low jitter of 90 fs rms. Input frequency ranges are 8 kHz to 750 MHz for differential and 8 kHz to 250 MHz for LVCMOS. Output frequency ranges extend from 100 Hz to 1028 MHz for differential and 100 Hz to 250 MHz for LVCMOS. Core voltages are VDD at 1.8 V ±5% and VDDA at 3.3 V ±5%. Operating temperature range is –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fractional and integer synthesis modes.
• Supports hitless input clock switching between fractionally related clocks and glitchless on-the-fly output frequency changes.
• Includes programmable jitter attenuation bandwidth ranging from 0.1 Hz to 4 kHz for optimized performance.
• Features in-circuit programmable non-volatile memory allowing the device to power up with a known frequency configuration.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation, as custom factory preprogrammed devices utilize unique numerical sequences. Confirm RoHS compliance status and moisture sensitivity level prior to assembly. Ensure the serial interface configuration matches the system requirements for I2C or SPI control.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model for applications requiring two high-performance outputs with ultra-low jitter specifications. The Si5342 variant offers four inputs and two outputs within a compact 44-QFN package. Verify that the required output frequency range and input signal types align with the device capabilities before finalizing the design.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345/44/42 Rev D family of jitter attenuators. The Si5342 specifically provides four inputs and two outputs, distinguishing it from the Si5344 (four outputs) and Si5345 (ten outputs). All variants share the same core DSPLL and MultiSynth technology architecture.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Public confirmed substitute part numbers: SI5342B-D-GM, SI5342C-D-GM, SI5342D-D-GM.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency for differential signals?

The maximum output frequency for differential signals is 1028 MHz.

How does the device handle input clock loss?

The device monitors inputs for Loss of Signal (LOS) and Out-of-Frequency (OOF). If the selected input fails and no other valid inputs are available, it enters holdover mode using stored historical data.

Can the device switch between inputs without glitches?

Yes, the device supports hitless switching for fractionally related inputs and glitchless switching for inputs up to ±500 ppm apart.