SI5345B-D06491-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5345B-D06491-GM is a 10-output jitter attenuator and clock multiplier from the Si5345 Rev D family. It features four differential or LVCMOS inputs and supports output frequencies up to 350 MHz with an ultra-low jitter of 90 fs rms. The device operates on a core voltage (VDD) of 1.8 V ±5% and an analog supply (VDDA) of 3.3 V ±5%. It utilizes fourth-generation DSPLL and MultiSynth technologies for any-frequency generation, supporting integer and fractional synthesis modes. The component is housed in a 64-QFN package measuring 9x9 mm and functions within a temperature range of -40°C to +85°C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Combines fourth-generation DSPLL and MultiSynth technologies for high-performance jitter attenuation and frequency multiplication.
• Supports hitless input clock switching between fractionally related sources with automatic or manual selection capabilities.
• Includes in-circuit programmable non-volatile memory to ensure known frequency configuration upon power-up.
• Features fully integrated loop filter and digitally programmable jitter attenuation bandwidth for optimized performance.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory preprogramming details. Confirm that the requested part number matches the required output frequency range and package type. Ensure compatibility with the ClockBuilder Pro software version used for configuration. Check for any recent process change notifications or errata updates relevant to this revision.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when applications require up to ten outputs with frequencies capped at 350 MHz. Choose this variant over higher-speed options if the design prioritizes specific jitter attenuation characteristics within the lower frequency band. Ensure the system design accommodates the 1.8 V core and 3.3 V analog supply requirements. Verify that the 64-QFN package footprint fits the PCB layout constraints.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345/44/42 Rev D family of jitter attenuators. The Si5345 variant specifically provides four inputs and ten outputs, distinguishing it from the Si5344 (four outputs) and Si5342 (two outputs). All variants share the same underlying DSPLL and MultiSynth architecture but differ in pin count and output capacity.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5345B-D-GM is listed as a similar alternative. Verify if the generic ordering suffix meets the specific preprogramming requirements of the original part. Other family members like Si5345A or Si5345C offer different frequency ranges and synthesis modes.