ADC3564IRSBT

Analog To Digital Converters (ADC) Overview

The ADC3564 is a 14-bit, 125-MSPS high-speed analog-to-digital converter featuring ultra-low power consumption of 137 mW at full sampling rate. It provides a noise floor of –156 dBFS/Hz and supports an input bandwidth up to 1.4 GHz. The device operates with a 1.8 V analog supply (AVDD) and a 1.8 V digital I/O supply (IOVDD). Key performance metrics include a typical SNR of 77.5 dBFS at 10 MHz input frequency and a latency of one clock cycle for half-lane SLVDS interfaces. It includes an on-chip digital filter supporting decimation ratios from 2x to 32x.

Analog To Digital Converters (ADC) Feature Summary

• Ultra-low power architecture delivering 137 mW dissipation at maximum sampling speed
• Integrated programmable digital down-converter with 32-bit NCO for data rate reduction
• Flexible serial LVDS interface supporting two-lane, one-lane, and half-lane configurations
• Low latency design enabling signal processing within one or two clock cycles

Analog To Digital Converters (ADC) Applications

• High-speed data acquisition systems
• Software defined radio infrastructure
• Thermal imaging and radar applications
• Industrial monitoring and control loops
• Power quality analyzers and spectroscopy equipment

Analog To Digital Converters (ADC) Procurement Notes

Verify the specific ordering suffix against the manufacturer's official orderable addendum to confirm package type and temperature range. Ensure that the selected variant matches the required industrial operating specifications. Cross-reference the datasheet revision history to validate current documentation status before finalizing procurement orders.

Analog To Digital Converters (ADC) Selection Notes

Select this component when low power consumption and high dynamic range are critical requirements. The integrated digital filter allows for relaxed external anti-aliasing filter designs. Verify that the system clock amplitude meets the differential input voltage requirements for optimal SNR performance across the desired input frequency range.

Analog To Digital Converters (ADC) Part Context

The ADC3564 belongs to a pin-compatible family of high-speed ADCs that includes variants with different resolutions and sampling rates. It shares the same 40-pin WQFN footprint as other members in the series, facilitating board layout reuse across different product generations while offering distinct performance characteristics tailored for specific throughput needs.

Analog To Digital Converters (ADC) Replacement Considerations

Check the manufacturer's device comparison table for alternative models within the same family. Consider parts with lower sampling rates if power savings are prioritized over speed. Verify pin compatibility and register map similarities to minimize redesign efforts when substituting with other devices in the series.

Analog To Digital Converters (ADC) FAQ

What is the minimum sampling rate supported by the ADC3564?

The device supports a minimum sampling rate of 10 MSPS when using an external reference, and 100 MSPS when utilizing the internal reference.

How does the device handle analog input common mode voltage?

The analog inputs require an external common mode voltage of approximately 0.95 V. The device provides a VOCM output pin to assist in biasing the input stage.

What decimation options are available in the on-chip digital filter?

The digital down-converter supports real or complex decimation by factors of 2, 4, 8, 16, and 32.