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DS1305EN+ is listed in the Real Time Clock range at ChipApex. The manufacturer field lists Analog Devices Inc./Maxim Integrated. Its product description is IC RTC CLK/CALENDAR SPI 20TSSOP. Review the specifications below when checking this part for your BOM.
The DS1305EN+ is a serial alarm real-time clock (RTC) in a 20-pin TSSOP package, rated for industrial temperatures (-40°C to +85°C). It provides binary coded decimal (BCD) timekeeping including seconds, minutes, hours, date, month, day of week, and year with leap-year compensation through 2100. The device includes 96 bytes of battery-backed NV RAM and two programmable time-of-day alarms. It operates on a single supply voltage from 2.0V to 5.5V and supports both SPI (Modes 1 and 3) and standard 3-wire serial interfaces via the SERMODE pin.
Verify the ordering suffix 'EN+' confirms the -40°C to +85°C industrial temperature range and lead-free/RoHS compliance. Confirm the 20-pin TSSOP package matches the design footprint. Ensure the specific revision of the datasheet aligns with the manufactured lot, as electrical characteristics may vary slightly between revisions.
Select this component when an industrial temperature range is required alongside SPI or 3-wire connectivity. The DS1305EN+ differs from the commercial variant (DS1305E+) by its extended temperature rating. Ensure the system logic voltage is compatible with the VCCIF pin if interfacing with 3V logic while operating at higher primary supply voltages.
The DS1305 series is part of Analog Devices' (formerly Maxim Integrated) line of serial RTCs. The 'EN+' designation specifically identifies the industrial grade version in the 20-pin Thin Shrink Small Outline Package (TSSOP). This distinguishes it from the DIP package variants and the commercial temperature range versions within the same functional family.
Direct pin-compatible replacements include other DS1305 variants such as DS1305N (DIP, industrial) or DS1305E (TSSOP, commercial), provided the temperature requirements are met. Cross-family replacements require verification of interface compatibility and register mapping.
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