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GAL20V8B-15QPN is listed in the Programmable Logic Device Pld range at ChipApex. The manufacturer field lists Lattice Semiconductor Corporation. Its product description is IC CPLD 8MC 15NS 24DIP. Review the specifications below when checking this part for your BOM.
The GAL20V8B-15QPN is a discontinued Electrically Erasable Programmable Logic Device (EE PLD) manufactured by Lattice Semiconductor. It utilizes high-performance E2CMOS technology and features a 28-pin Plastic Leadless Chip Carrier (PLCC) package. The device provides 10 dedicated inputs, 8 I/O lines, and eight Output Logic Macrocells (OLMCs). Key electrical parameters include a maximum propagation delay of 15 ns, a typical operating supply current of 75 mA for the low-power variant, and an operating temperature range of -40°C to +85°C for industrial grade.
This component has been officially discontinued by Lattice Semiconductor per Product Change Notification (PCN) #09-10. No new units are available from the manufacturer. Verification of availability requires checking third-party distributors or surplus inventory providers. Designers should confirm lead times and authenticity carefully when sourcing from secondary markets.
Select this part only if legacy compatibility with specific PAL fuse maps or existing GAL20V8 designs is required. Consider the 15 ns speed grade and PLCC-28 package constraints. Evaluate power consumption requirements against the 75 mA typical supply current. Verify that the target application does not require RoHS compliance if the non-N suffix version is sourced.
The GAL20V8B series belongs to Lattice's Generic Array Logic family, designed to emulate various 20-pin PAL devices while offering reprogrammability. The 'B' suffix denotes the Industrial Grade specification, and 'QPN' indicates Quarter Power consumption, Plastic DIP packaging, and Lead-free construction. This device represents a transition technology between traditional fuses and modern CPLDs.
Lattice issued PCN #09-10 indicating discontinuation. Potential substitutes include other EE PLDs from Lattice or generic SPLDs, though pin-to-pin replacement may require schematic review due to architectural differences in macrocell configuration.
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