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HV2918/R4X is listed in the Analog Switches, Multiplexers, Demultiplexers range at ChipApex. The manufacturer field lists Microchip Technology. Its product description is IC SWITCH SPDT X 16 9OHM 64VQFN. Review the specifications below when checking this part for your BOM.
The HV2918/R4X is a 32-channel high-voltage analog switch featuring sixteen 2:1 multiplexers, housed in a 64-lead QFN package. It operates with a single +5V bias supply while passing ±100V pulsed signals up to 2.5 μs width. Key electrical parameters include a typical 6 Ω on-resistance, 50 MHz small-signal bandwidth, and -70 dB off-isolation at 5.0 MHz. The device integrates bleed resistors (20–50 kΩ) on SW outputs to discharge capacitive loads. Control is managed via a serial interface supporting clock frequencies up to 66 MHz.
Verify the R4X suffix confirms the 64-lead QFN packaging configuration. Ensure the HV2918 variant is selected specifically for applications requiring integrated output bleed resistors, as the HV2818 lacks this feature. Confirm logic supply voltage compatibility with the system's digital interface levels before integration.
Select the HV2918 over the HV2818 when connected to highly capacitive loads like piezoelectric elements to prevent voltage buildup. Verify that the application utilizes pulsed signals within the 2.5 μs width limit, as DC high-voltage signals are not supported. Ensure the PCB layout accommodates separate DGND and GND planes to manage high transient currents effectively.
This component belongs to Microchip's second-generation PolarFire-compatible high-voltage switch family. It serves as a direct pin-to-pin replacement for the HV2801/HV2901 series, maintaining similar functionality but eliminating the need for external high-voltage bias supplies. The R4X designation identifies the specific 9x9 mm QFN package form factor used in modern dense layouts.
The HV2918/R4X is functionally equivalent to the HV2901/R4X. Designers upgrading from the HV2901 can remove external high-voltage bias generation circuitry. Ensure the asymmetric topology constraints regarding SW pin voltage during the OFF state are respected in the new design.
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