SI5346A-D06344-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5346A-D06344-GM is a dual DSPLL jitter attenuator in a 44-QFN package. It provides four outputs with frequencies up to 720 MHz. The device supports differential inputs from 8 kHz to 750 MHz and LVCMOS inputs from 8 kHz to 250 MHz. Output levels include CML, HCSL, LVCMOS, LVDS, and LVPECL. Operating voltage ranges from 1.71 V to 1.89 V for the core and 3.14 V to 3.47 V for I/O. It operates between -40 °C and +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Dual independent DSPLLs enable any-frequency conversion from any input source.
• Supports automatic and hitless input clock switching with holdover modes.
• Features programmable jitter attenuation bandwidth per DSPLL ranging from 0.1 Hz to 4 kHz.
• Includes in-circuit programmable non-volatile memory for known power-up configurations.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory pre-programmed configuration details. Ensure compatibility with ClockBuilder Pro software for final parameter validation before deployment.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when dual independent timing paths are required within a compact form factor. Verify that the maximum output frequency of 720 MHz meets system requirements. Confirm input signal types match the supported differential or LVCMOS specifications.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5346 family, which features dual DSPLL technology. It serves as a lower-pin-count alternative to the quad-DSPLL Si5347 model while maintaining similar jitter performance and flexibility for high-performance networking applications.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5346B-D-GM offers a reduced output frequency range up to 350 MHz. The Si5347 series provides quad DSPLL capabilities in a larger 64-QFN package. Verify pinout and register compatibility when substituting models.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the typical jitter performance of the SI5346A?

The device provides ultra-low jitter performance with a typical value of 95 fs rms measured between 12 kHz and 20 MHz.

How does the device handle input clock failures?

The device automatically enters Holdover Mode using stored historical frequency data if the selected input clock becomes invalid and no other valid inputs are available.

Can the device switch between inputs without glitches?

Yes, it supports glitchless input switching for frequencies up to ±500 ppm apart and hitless switching for frequency-locked inputs.