SI5346B-B03114-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5346B-B03114-GM is a dual DSPLL jitter attenuator in a 44-lead QFN package. It features two independent phase-locked loops with four inputs and four outputs. The device supports differential input frequencies from 8 kHz to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 350 MHz for the B-grade variant. It provides ultra-low jitter performance of 95 fs rms (12 kHz–20 MHz). Operating voltages include VDD at 1.8 V ±5% and VDDA at 3.3 V ±5%. The component operates within a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Dual independent DSPLLs enable flexible routing between any input and any output clock
• Supports hitless, glitchless, and ramped input switching for seamless transitions
• Includes automatic holdover mode to maintain timing during input signal loss
• Features programmable loop bandwidth and Fastlock for optimized lock acquisition

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• Broadcast video systems

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm factory pre-programmed configurations. Ensure compatibility with ClockBuilder Pro software for generating valid configuration files. Confirm package dimensions and thermal requirements match the target PCB layout specifications before finalizing procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when dual independent timing paths are required in a compact form factor. The Si5346B variant is suitable for applications requiring output frequencies up to 350 MHz. Consider the Si5346A if higher output frequencies up to 720 MHz are necessary. Verify that the serial interface (I2C or SPI) matches the system controller capabilities.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5347/46 family utilizing fourth-generation DSPLL technology. The Si5346 serves as the dual-PLL counterpart to the quad-PLL Si5347, offering reduced pin count and package size while maintaining similar jitter attenuation capabilities. Both devices share common programming tools and operational modes.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5346A-D-GM is a compatible alternative within the same series offering higher frequency support. The Si5347 series provides quad-PLL functionality but requires a larger 64-lead package. Verify register compatibility and pinout alignment when substituting these variants.