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AD8183ARU is listed in the Analog Switches, Multiplexers, Demultiplexers range at ChipApex. The manufacturer field lists Analog Devices Inc.. Its product description is IC MULTIPLEXER TRPL 2X1 24TSSOP. Review the specifications below when checking this part for your BOM.
The AD8183ARUZ is a triple 2:1 multiplexer with unity gain, operating on ±5 V supplies. It features a small-signal bandwidth of 590 MHz at 200 mV p-p and 380 MHz into 150 Ω loads. The device exhibits a slew rate of 1000 V/µs for 2 V steps and settles to 0.1% within 15 ns. Quiescent current consumption is 25 mA. Key isolation metrics include –100 dB OFF isolation at 10 MHz and –56 dB channel-to-channel crosstalk at 100 MHz.
Verify the specific ordering suffix (e.g., RUZ) against the manufacturer's official documentation to confirm package type and RoHS compliance status. Confirm that the intended application environment remains within the specified –40°C to +85°C operating temperature range. Ensure supply voltages are strictly maintained within the ±4.5 V to ±5.5 V operational limits to prevent device damage or performance degradation.
Select the AD8183ARUZ when a unity gain configuration is required for triple-channel video routing. Compare against the AD8185 variant if a gain-of-two amplification stage is necessary for the specific system architecture. Consider the 24-lead TSSOP package dimensions for PCB layout constraints and verify thermal dissipation requirements based on ambient conditions and power derating curves.
This component belongs to the Analog Devices AD8183/AD8185 family of high-speed triple 2:1 multiplexers. These devices are engineered for professional video applications requiring low distortion and fast switching speeds. The family shares similar pinouts and functional architectures, differing primarily in internal gain settings and specific bandwidth optimizations for various load impedances.
The AD8185ARUZ serves as a functional alternative within the same series, offering identical pinout and switching characteristics but configured for a gain of +2 rather than unity. Designers must account for the voltage gain difference when substituting this part to ensure signal levels remain within acceptable ranges for downstream components.
The OE (Output Enable) logic pin controls the state of all three outputs. When asserted, the outputs enter a high-impedance state, allowing multiple devices to be bus-connected without loading active channels.
The device specifies a differential gain error of 0.01%, ensuring minimal amplitude distortion for composite video signals such as NTSC or PAL.
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