MC100EP56DT

Overview

The MC100EP56DT is a dual, fully differential 2:1 multiplexer from the onsemi MC100 series. It operates in PECL mode with VCC ranging from 3.0 V to 5.5 V (VEE = 0 V) and NECL mode with VEE ranging from -3.0 V to -5.5 V (VCC = 0 V). The device features typical propagation delays of 360 ps and supports maximum frequencies exceeding 3 GHz. It includes temperature compensation, separate and common select inputs, and internally generated VBB output reference voltage pins.

Feature Summary

• Dual fully differential data path designed for low skew clock or skew-sensitive signal multiplexing
• Temperature compensated logic family ensuring stable performance across operating temperatures
• Integrated VBB pin providing an internal reference voltage for unused differential inputs or AC coupling rebiasing
• Safety clamps on inputs with open input default state ensuring predictable Q output LOW when inputs are open

Applications

• Multiplexing low skew clock signals
• Skew sensitive signal routing applications
• Data path switching circuits
• Random logic applications requiring differential ECL compatibility

Procurement Notes

Verify the specific suffix DT corresponds to the TSSOP-20 package variant. Confirm RoHS compliance and Pb-Free status as indicated by the G suffix in ordering information. Ensure power supply connections for all VCC and VEE pins are externally connected to guarantee proper operation. Check moisture sensitivity levels appropriate for the TSSOP-20 package before assembly.

Selection Notes

Select this component for high-speed differential signal routing where minimal skew is critical. The MC100 series offers temperature compensation compared to standard variants. Consider the availability of separate and common select inputs for flexible control schemes. Verify that the required VCC and VEE voltage ranges align with the system's PECL or NECL configuration requirements.

Part Context

This part belongs to the MC10/100EP56 family of dual differential 2:1 multiplexers. The 100 series specifically incorporates temperature compensation. It is available in multiple packages including SOIC-20, TSSOP-20, and QFN-20. The device utilizes ECL logic standards and is designed for high-frequency applications up to 3 GHz.

Replacement Considerations

MC10EP56DTG is the non-temperature-compensated equivalent in the same TSSOP-20 package.